february 2006 dsc-6819/0b 1 ?2006 integrated device technology, inc. features 32k x 8 advanced high-speed cmos static ram automotive temperature options equal access and cycle times ? automotive: 12/15/20/25/35/55ns one chip select plus one output enable pin bidirectional data inputs and outputs directly ttl-compatible low power consumption via chip deselect automotive product available in 28-pin, 300 mil (soic) package description the idt71256sa is a 262,144-bit high-speed static ram organized as 32k x 8. it is fabricated using idt?s high-perfomance, high-reliability cmos technology. this state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs for automotive applications. the idt71256sa has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns. all bidirectional inputs and outputs of the idt71256sa are ttl-compatible and operation is from a single 5v supply. fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. the idt71256sa is packaged in 28-pin, 300 mil (soic). functional block diagram cmos static ram for automotive applications 256k (32k x 8-bit) idt71256sa a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 i /o 0- i/o 7 cs we oe 8 8 control logic i/o control 262,144-bit memory array address decoder 6819 drw 01 ,
2 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive te mperature ranges absolute maximum ratings (1) pin configurations dip/soj top view recommended operating temperature and supply voltage recommended dc operating conditions truth table (1,2) tsop top view 6819 drw 02a 22 23 24 25 26 27 28 1 2 3 4 5 7 6 21 20 19 18 17 16 15 14 13 12 11 10 9 8 a 10 cs i/o 7 i/o 6 i/o 5 i/o 4 i/o 3 gnd i/o 2 i/o 1 i/o 0 a 0 a 1 a 2 so28-8 oe a 11 a 9 a 8 a 13 a 14 a 7 a 6 a 5 a 4 a 3 a 12 we v cc , 6819 drw 02 5 6 7 8 9 10 11 12 g nd 1 2 3 4 24 23 22 21 20 19 18 17 so28-5 p28-2 p28-1 13 14 28 27 26 25 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 i/o 0 i/o 1 i/o 2 v cc a 14 we a 13 a 8 a 10 a 11 oe a 12 cs i/o 7 i/o 6 i/o 5 i/o 4 i/o 3 a 9 16 15 , note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. symbol rating value unit v cc supply voltage relative to gnd -0.5 to +7.0 v v term terminal voltage relative to gnd -0.5 to v cc +0.5 v t bias temperature under bias -55 to +125 o c t j junction temperature range -40 to +150 o c t stg storage temperature -65 to +150 o c p t power dissipation 1.0 w i out dc output current 50 ma 6819 tbl 02 notes: 1. h = v ih , l = v il , x = don't care. 2. v lc = 0.2v, v hc = v cc ?0.2v. 3. other inputs v hc or v lc . cs oe we i/o function llhdata out read data lxldata in write data l h h high-z outputs disabled h x x high-z deselected - standby (i sb ) v hc (3) x x high-z deselected - standby (i sb1 ) 6819 tbl 03 symbol parameter min. typ. max. unit v cc supply voltage 4.5 5.0 5.5 v gnd ground 0 0 0 v v ih input high voltage 2.2 ____ v cc +0.5 (1) v v il input low voltage -0.5 (1) ____ 0.8 v 6819 tbl 04 grade temperature v ss v dd automotive grad e 1 -40c to +125c 0v see below automotive grade 2 -40c to +105c 0v see below automotive grade 3 -40c to +85c 0v see below automotive grade 4 0c to +70c 0v see below 6819 tbl 01 note: 1. refer to maximum overshoot/undershoot diagram below. the measured voltage at device pin should not exceed half sinusoidal wave with 2v peak and half period of 2ns. maximum overshoot/undershoot v il v ih 6819 drw 10 +2v -2v 2ns 2ns
6.42 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive t emperature ranges 3 figure 2. ac test load (for t clz , t olz , t chz , t ohz , t ow, and t whz ) figure 1. ac test load *including jig and scope capacitance. dc electrical characteristics (1) (v cc = 5.0v 10%, v lc = 0.2v, v hc = v cc ?0.2v, automotive temperature ranges) ac test conditions capacitance (t a = +25c, f = 1.0mhz, soj package) dc electrical characteristics (v cc = 5.0v 10%, automotive temperature ranges) 6819 drw 03 480 ? 255 ? 30pf* d ata out 5v , 6819 drw 04 480 ? 255 ? 5pf* d ata out 5v . symbol parameter test conditions idt71256sa unit min. max. |i li | input leakage current v cc = max., v in = gnd to v cc ___ 5a |i lo | output leakage current v cc = max., cs = v ih , v out = gnd to v cc ___ 5a v ol output low voltage i ol = 8ma, v cc = min. ___ 0.4 v v oh output high voltage i oh = -4ma, v cc = min. 2.4 ___ v 6819 tbl 05 notes: 1. all values are maximum guaranteed values. 2. f max = 1/t rc (all address inputs are cycling at f max ); f = 0 means no address input lines are changing. symbol parameter 71256sa12 71256sa15 71256sa20 71256sa25 71256sa35 71256sa55 unit icc dynamic operating current cs < v il , outputs open, v cc = max., f = f max (2) 90 80 70 70 70 70 ma i sb standby power supply current (ttl level) cs > v ih , outputs open, v cc = max., f = f max (2) 50 30 20 20 20 20 ma i sb 1 standby power supply current (cmos level) cs > v hc , outputs open, v cc = max., f = 0 (2) , v in < v lc or v in > v hc 15 15 15 15 15 15 ma 6819 tbl 10 input pulse levels inp ut rise /fall time s input timing reference levels output reference levels ac test load gnd to 3.0v 3ns 1.5v 1.5v see figures 1 and 2 6819 tbl 07 note: 1. this parameter is guaranteed by device characterization, but not production tested. symbol parameter (1) conditions max. unit c in input capacitance v in = 3dv 7 pf c i/o i/o capacitance v out = 3dv 7 pf 6819 tbl 08
4 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive te mperature ranges ac electrical characteristics (v cc = 5.0v 10%, automotive temperature ranges) note: 1. this parameter is guaranteed with the ac load (figure 2) by device characterization, but is not production tested. symbol parameter 71256sa12 71256sa15 71256sa20 71256sa25 71256sa35 71256sa55 unit min. max. min. max. min. max. min. max. min. max. min. max. read cycle t rc read cycle time 12 ____ 15 ____ 20 ____ 25 ____ 35 ____ 55 ____ ns t aa address access time ____ 12 ____ 15 ____ 20 ____ 25 ____ 35 ____ 55 ns t acs chip select access time ____ 12 ____ 15 ____ 20 ____ 25 ____ 35 ____ 55 ns t clz (1) chip select to output in low-z 4 ____ 4 ____ 4 ____ 4 ____ 4 ____ 4 ____ ns t chz (1) chip select to output in high-z 0 6 0 7 0 10 0 11 0 12 0 15 ns t oe output enable to output valid ____ 6 ____ 7 ____ 10 ____ 11 ____ 12 ____ 25 ns t olz (1) output enable to output in low-z 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ ns t ohz (1) output disable to output in high-z 0 6 0 6 0 8 0 10 0 12 0 15 ns t oh output hold from address change 3 ____ 3 ____ 3 ____ 3 ____ 3 ____ 3 ____ ns t pu (1) chip select to power up time 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ ns t pd (1) chip deselect to power down time ____ 12 ____ 15 ____ 20 ____ 25 ____ 35 ____ 55 ns write cycle t wc write cycle time 12 ____ 15 ____ 20 ____ 25 ____ 35 ____ 55 ____ ns t aw address valid to end-of-write 9 ____ 10 ____ 15 ____ 20 ____ 25 ____ 40 ____ ns t cw chip select to end-of-write 9 ____ 10 ____ 15 ____ 20 ____ 25 ____ 40 ____ ns t as address set-up time 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ ns t wp write pulse width 8 ____ 10 ____ 15 ____ 20 ____ 20 ____ 35 ____ ns t wr write recovery time 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ ns t dw data valid to end-of-write 6 ____ 7 ____ 11 ____ 13 ____ 13 ____ 25 ____ ns t dh data hold time 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ 0 ____ ns t ow (1) output active from end-of-write 4 ____ 4 ____ 4 ____ 4 ____ 4 ____ 4 ____ ns t whz (1) write enable to output in high-z 0 6 0 6 0 10 0 11 0 12 0 15 ns 6819 tbl 09
6.42 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive t emperature ranges 5 timing waveform of read cycle no. 1 (1) address oe cs data out v cc supply current 6819 drw 05 (5) (5) (5) (5) data valid high impedance t aa t rc t oe t acs t olz t chz t clz (3) t ohz out t pu t pd i cc i sb , timing waveform of read cycle no. 2 (1,2,4) notes: 1. we is high for read cycle. 2. device is continuously selected, cs is low. 3. address must be valid prior to or coincident with the later of cs transition low; otherwise t aa is the limiting parameter. 4. oe is low. 5. transition is measured 200mv from steady state. data out a ddress 6819drw 06 t rc t aa t oh t oh data out valid previous data out valid ,
6 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive te mperature ranges timing waveform of write cycle no. 1 ( we controlled timing) (1,2,4) notes: 1. a write occurs during the overlap of a low cs and a low we . 2. oe is continuously high. if during a we controlled write cycle oe is low, t wp must be greater than or equal to t whz + t dw to allow the i/o drivers to turn off and data to be placed on the bus for the required t dw . if oe is high during a we controlled write cycle, this requirement does not apply and the minimum write pulse is as short as the specified t wp . 3. during this period, i/o pins are in the output state, and input signals must not be applied. 4. if the cs low transition occurs simultaneously with or after the we low transition, the outputs remain in a high-impedance state. 5. transition is measured 200mv from steady state. timing waveform of write cycle no. 2 ( cs controlled timing) (1,4) a ddress cs we data out data in 6819 drw 07 (5) (3) (3) (2) (5) (5) data in valid high impedance t wc t as t whz t wp t chz t ow t dw t wr t aw t dh , cs address we 6819 drw 08 data in valid t aw t wc t cw t as t wr t dw t dh data in ,
6.42 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive t emperature ranges 7 ordering information ? automotive sa power xx speed xxx package x process/ temperature range 1 2 3 4 automotive grade 1 (-40c to +125c) automotive grade 2 (-40c to +105c) automotivegrade3(-40cto+85c) automotivegrade4(0cto+70c) so 300-mil soic (ps28) 12 * 15 20 25 35 55 71256 device type i dt speed in nanoseconds 6819 drw 09 x g restricted hazardous substance device *only offered in grades 3 and 4
8 idt71256sa for automotive applications cmos static ram 256k (32k x 8-bit) automotive te mperature ranges datasheet document history the idt logo is a registered trademark of integrated device technology, inc. rev date page description 0 01/31/05 p. 1-7 released automotive datasheet a 05/06/05 p. 7 updated ordering information. b 02/28/06 p. 1,3,4,7 added 35ns speed grade. corporate headquarters for sales: for tech support: 6024 silver creek valley road 800-345-7015 or sramhelp@idt.com san jose, ca 95138 408-284-8200 800-345-7015 fax: 408-284-2775 www.idt.com
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